During module final tests, yield losses can be due to silicon imperfections (i.e., cracks, dings, nicks, pits, scratches, etc.) on the backside of the wafer or die. These silicon imperfections start at the surface of the backside, but also extend further into the silicon and into the functional circuitry. However, some imperfections on the surface of the silicon do not extend into the functional circuitry. These imperfections are a concern because, although these imperfections are only at the surface during the module final testing stage, temperature cycling during operation can propagate the imperfections into the functional circuitry.
Backside grinding (BSG) is a method to remove these surface imperfections by grinding down the thickness of the silicon wafer. However, in flip chip technologies, or other technologies where the entire thickness of the silicon wafer is desired, BSG is not a viable method to remove the surface imperfections of the silicon wafer.